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AK4116
Low Power 48kHz 24-Bit DIR
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  1. AES3, IEC60958, S/PDIF, EIAJ CP1201 Compatible
  2. Low jitter Analog PLL
  3. PLL Lock Range : 32kHz to 48kHz
  4. Clock Source: PLL or X'tal
  5. Auxiliary digital input
  6. Detection Functions
    Non-PCM Bit Stream Detection
    DTS-CD Bit Stream Detection
    Sampling Frequency Detection (32kHz, 44.1kHz, 48kHz)
    Unlock & Parity Error Detection
    Validity Flag Detection
  7. Up to 24bit Audio Data Format
  8. Audio I/F: Left justified, Right justified (16bit, 18bit, 20bit, 24bit), I²S
  9. 40-bit Channel Status Buffer
  10. . Burst Preamble bit Pc and Pd Buffer for Non-PCM bit stream
  11. Q-subcode Buffer for CD bit stream
  12. 4-wire Serial ??P I/F
  13. Master Clock Output: 128fs/256fs/512fs
  14. Operating Voltage: 2.7 to 3.6V
  15. Small Package: 20pin QFN
  16. Ta: 40 to 85°C
AK4116 BLOCK DIAGRAM
AK4116 Diagram
Data Sheet PDF
Datasheet

Data Sheets
Rev. MS0156-E-03 2005/08
PDF : 357KB / 37pages

Evalution Board Manual
Evalution Board Manual
Rev. KM077400 2005/01
PDF : 231KB / 19pages
Further Information