(2) Input Signal Formats: Y/Cb/Cr 4:2:2 (8bit x 2)
- 525i / 625i
- 525p / 625p
- 1080i / 720p
( note ) ITU-R656-4 compatible mode in 525i / 625i formats

(3) Output Signals:
Y/Pb/Pr Interlace (EIA 770.1-A) (EIA 770.3-A)
Y/Pb/Pr Progressive (EIA 770.2-A) (EIA 770.3-A)

(4) On chip out-put limiter

(5) Input Signal Synchronization:
- EAV Decode (*)
- Slave Operation by HSYNC / VSYNC signals

(6) VBID ( CGMS-A ), CC / XDS, WSS

(7) Macrovision 525i / 625i Rev. 7.1.1L and 525p / 625p Macrovision Progressive 1.2

(8) On-Chip Color Bar Generator

(9) On-Chip Black Burst Generator

(10) Adjustable YPbPr Delay Function

SD NTSC/PAL Encoder

(1) NTSC-M, PAL-B, D, G, H, I. M, N Encoding

(2) S-Video Output

(3) On-chip out-put limiter

(4) ITU-R BT.656, 4:2:2, 8 Bit Parallel Input ( EAV Decoding )

(5) Slave Operation by HSYNC / VSYNC Signals

(6) VBID ( CGMS-A ), CC / XDS, WSS

(7) Macrovision Anti-Taping Rev. 7.1.1L

Common Specification

• I²C Bus I / F ( 400 KHz )
• Power-Down Mode
• On-Chip VREF
• 3.0 V, 1.8 V CMOS
• 65 Pin BGA

(Note) This device is protected by U.S. patent numbers 4,631,603, 4,577,216, and 4,819,098, and other intellectual rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay-per-view use only, unless otherwise authorized in written by Macrovision. Reverse engineering or disassembly is prohibited.